In the semiconductor industry, with continual scaling of feature size and increasingly expanding functionalities of chips, the critical pitch in a semiconductor chip is also reduced. To fabricate such a small critical pitch, a large number of photomasks, or more simply masks, are required during the fabrication. Multi-patterning or multiple patterning technology for photolithography has been developed to enhance feature density in an integrated circuit (IC). While multi-patterning technology facilitates fabrication of device features, pin accessibility may be adversely affected and thus become a challenge in layout design.